Processes executing on computing devices often require data to be used in computations. This data is typically stored by the operating system in memory, such as RAM. This memory is broken up into chunks called pages. Each page is associated with a unique address. When processes require data, the data is referenced by its unique address, and the address is used to lookup the physical location of the page to return the data. One common way this address to physical location translation is performed is by traversing a page table hierarchy. Such hierarchies trade off the size of the pages that are addressed with the number of levels in the hierarchy. However, the size of the pages also dictates how efficiently the memory space is used, with larger pages being less efficient. Therefore, there is a direct trade off between space efficiency (due to page size) and translation time efficiency (due to the number of pages in the page table hierarchy).
An additional factor in determining the efficiency of a page table system consists of the needs of the processes. If processes typically require large amounts of data, then larger pages may in fact be efficient in terms of memory usage. However, if processes typically require small amounts of data, then smaller pages will be more efficient. Since processes of both types tend to operate on computing devices, a method of dynamically supporting both would lead to greater efficiency. Operating system support for large pages is also not as robust in computing devices as support for smaller sized pages. This leads to an additional challenge in using large pages.